1. Field of the Invention
The present invention relates to the manufacture of very large scale integrated (VLSI) circuit devices. In particular, the present invention provides a method and apparatus for converting a chip design into a phase shifted mask design for producing the chip.
2. Description of Related Art
A very large scale integrated (VLSI) complementary metal oxide semiconductor (CMOS) chip is manufactured on a silicon wafer by a sequence of material additions (i.e., low pressure chemical vapor depositions, sputtering operations, etc.), material removals (i.e., wet etches, reactive ion etches, etc.), and material modifications (i.e., oxidations, ion implants, etc.). These physical and chemical operations interact with the entire wafer. For example, if a wafer is placed into an acid bath, the entire surface of the wafer will be etched away. In order to build very small electrically active devices on the wafer, the impact of these operations has to be confined to small, well defined regions.
Lithography in the context of VLSI manufacturing of CMOS devices is the process of patterning openings in photosensitive polymers (sometimes referred to as photoresists or resists) which define small areas in which the silicon base material is modified by a specific operation in a sequence of processing steps. The manufacturing of CMOS chips involves the repeated patterning of photoresist, followed by an etch, implant, deposition, or other operation, and ending with the removal of the expended photoresist to make way for the new resist to be applied for another iteration of this process sequence.
The basic lithography system consists of a light source, a stencil or photo mask containing the pattern to be transferred to the wafer, a collection of lenses, and a means for aligning existing patterns on the wafer with patterns on the mask. The aligning may take place in an aligning step or steps and may be carried out with an aligning apparatus. Since a wafer containing from 50 to 100 chips is patterned in steps of 1 to 4 chips at a time, these lithography tools are commonly referred to as steppers. The resolution, R of an optical projection system such as a lithography stepper is limited by parameters described in Raleigh""s equation:
R=kxcex/NA
Where xcex represents the wavelength of the light source used in the projection system and NA represents the numerical aperture of the projection optics used. xe2x80x9ckxe2x80x9d represents a factor describing how well a combined lithography system can utilize the theoretical resolution limit in practice and can range from about 0.8 down to about 0.5 for standard exposure systems. The highest resolution in optical lithography is currently achieved with deep ultra violet (DUV) steppers operating at 248 nm, wavelengths of 356 nm are also in widespread use and 193 nm wavelength lithography is becoming commonplace.
Conventional photo masks consist of chromium patterns on a quartz plate, allowing light to pass wherever the chromium has been removed from the mask. Light of a specific wavelength is projected through the mask onto the photoresist coated wafer, exposing the resist wherever hole patterns are placed on the mask. Exposing the resist to light of the appropriate wavelength causes modifications in the molecular structure of the resist polymers which allow a developer to dissolve and remove the resist in the exposed areas. (Negative resist systems allow only unexposed resist to be developed away.) The photo masks, when illuminated, can be pictured as an array of individual, infinitely small light sources which can be either turned on (points in clear areas) or turned off (points covered by chrome). If the amplitude of the electric field vector which describes the light radiated by these individual light sources is mapped across a cross section of the mask, a step function will be plotted reflecting the two possible states that each point on the mask can be found (light on, light off).
The conventional photo masks are commonly referred to as chrome on glass (COG) binary masks, due to the binary nature of the image amplitude. The perfectly square step function of the light amplitude exists only in the theoretical limit of the exact mask plane. At any given distance away from the mask, such as in the wafer plane, diffraction effects will cause images to exhibit a finite image slope. At small dimensions, that is, when the size and spacing of the images to be printed are small relative to the xcex/NA, electric field vectors of adjacent images will interact and add constructively. The resulting light intensity curve between the features is not completely dark, but exhibits significant amounts of light intensity created by the interaction of adjacent features. The resolution of an exposure system is limited by the contrast of the projected image, that is, the intensity difference between adjacent light and dark features. An increase in the light intensity in nominally dark regions will eventually cause adjacent features to print as one combined structure rather than discrete images.
The quality with which small images can be replicated in lithography depends largely on the available process latitude; that is, that amount of allowable dose and focus variation that still results in correct image size. Phase shifted mask (PSM) lithography improves the lithographic process latitude or allows operation at a lower k value by introducing a third parameter on the mask. The electric field vector, like any vector quantity, has a magnitude and direction, so, in addition to turning the electric field amplitude on and off, it can be turned on with a phase of about 0xc2x0 or turned on with a phase of about 180xc2x0. This phase variation is achieved in PSMs by modifying the length that a light beam travels through the mask material. By recessing the mask to an appropriate depth, light traversing the thinner portion of the mask and light traversing the thicker portion of the masks will be 180xc2x0 out of phase, that is, their electric field vector will be of equal magnitude but point in exactly opposite directions so that any interaction between these light beams results in perfect cancellation. For more information on PSMs, please see xe2x80x9cPhase-Shifting Mask Strategies: Isolated Dark Linesxe2x80x9d. Mark D. Levenson, Microlithography World, March/April 1992, pp. 6-12, the entire contents of which are hereby incorporated by reference.
Even though resolution enhancement through the use of hard phase shifted masks (frequency doubling masks) has been extensively proven, implementation of this technique is critically dependent on computer assisted (CAD) technology that can modify existing circuit designs to incorporate the additional design levels needed to build a phase shifted mask. Design modifications consist of defining regions on the mask that require phase shifting (i.e., by etching into the mask substrate) relative to the rest of the mask, and of creating shapes that are to eliminate lines printed by unwanted phase edges. The basic concept of creating a phase transition across any small feature is easily realized and can be done, given sufficient time, on a graphics terminal by hand. The challenge that needs to be met before introducing hard phase shifters to VLSI product programs lies in the rapid, reliable design modifications of complex chip designs.
Alternating Phase Shifted Mask (altPSM) lithography is recognized throughout the industry as a prime candidate for high resolution patterning of critical product levels. Specifically, altPSM is being proposed as the lithography solution for patterning of logic gate levels by all major IC manufacturers for the 130 nm SIA technology node. A major issue in the imaging of bright field layouts, i.e. layouts that seek to print dark line patterns in a clear background, with altPSM is the fact that the altPSM design and manufacturing process forces closed loop topologies on the phase shapes. Phase shapes have to be designed as polygons, only a subset of the phase polygon edges actually contributes to the imaging of the desired patterns, the rest are present only to close the shape that defines the etched area on the photomask. The same destructive interference of light that is exploited in the fundamental principle of alternating PSM also causes images to be printed by these residual phase edges.
Several approaches have been experimented with to eliminate the image of the residual phase edge in a single exposure technique. Unfortunately, all these approaches falter at layout densities required to support aggressive high resolution lithography. The IC industry has therefore accepted the additional cost and complexity of two exposure alternating PSM technique. In the two exposure technique, the altPSM exposure is complemented with a second exposure into the same undeveloped photo resist that was exposed by the altPSM to create an incoherent sum of two images that resemble the target image of the layout. Initial embodiments of the two exposure altPSM process used an altPSM layout that included all the layout shapes of the original design plus the 180xc2x0 phase regions adjacent to all critical feature segments. The second, trim mask, exposure consisted of a generally opaque (dark field) mask with openings placed in order to allow light to expose the images left by the shadows projected by the residual phase edges.
While the lithographic benefits of altPSMs in enhancing the process window of critical features have been clearly demonstrated, in reality, it is the common process window, i.e., the process window shared by features of various pitches, that determines the overall process window achievable by any lithography technique. Proximity effects, i.e., changes in printed line width based on the local environment a structure is located in, will shift the process window for various structures to different nominal exposure doses, reducing the common overlap region between the process windows, thereby yielding a process with reduced common process window. In altPSM, it is well known in the lithography community that proximity effects are largely influenced by the width of the phase region adjacent to the printed structure.
Furthermore, it is important to account for secondary lithography effects such as lens aberrations in the simulations used to optimize a phase shifted design. One key measurable parameter to assess the impact of process errors such as lens aberrations on lithographic process window is the linewidth variation introduced by their presence.
It can be shown that for a realistic set of lens aberrations encountered in current production exposure tools the overall chip quality will be limited by the linewidth errors introduced by aberrations on the isolated lines to the point of obliterating any benefit of using altPSM over other lithography techniques.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide a method which optimizes the common process window achievable with altPSM in the presence of lens aberrations and proximity effects.
It is another object of the present invention to provide a method of generating a mask layout utilizing altPSM to generate superior linewidth quality in the presence of lens aberrations and proximity effects.
A further object of the invention is to provide a method of altPSM lithography which can overcome the problems associated with lens aberrations and proximity effects in existing manufacturing processes and currently installed tool sets.
It is yet another object of the present invention to provide an altPSM which reduces the effects of lens aberrations for use in double exposure PSM lithography.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.
The above and other objects and advantages, which will be apparent to one of skill in the art, are achieved in the present invention which is directed to, in a first aspect, a method of improving across field line width variation in alternating phase shifted mask lithography comprising the steps of: providing a chip layout having a plurality of features; determining which of the plurality of features are critical features; forming a plurality of phase regions on either side of the critical features such that a grating pattern of substantially uniform pitch is formed on a mask layout; providing a complementary mask pattern to selectively erase undesired printed images of the grating pattern; and reconstructing features of the chip layout to form a desired mask layout.
The method of this aspect may further include the step of: forming auxiliary phase transitions as determined by available space between the plurality of phase regions such that a grating pattern of substantially uniform pitch is formed on a mask layout comprising the plurality of features and the auxiliary phase transitions. Additional steps may include forming auxiliary phase transitions determined by available space surrounding the critical features; and forming additional phase regions on either side of the auxiliary phase transitions as needed. Preferably, during the step of forming auxiliary phase transitions, a width of the auxiliary phase transition is substantially equal to a width of a most narrow one of the critical features. Preferably, during the step of forming auxiliary phase transitions, a minimum spacing required to form the auxiliary phase transition is substantially equal to two phase region widths plus one auxiliary phase transition width. Preferably, in the step of forming a plurality of phase regions, a width of each phase region is substantially equal to a minimum spacing between the critical shapes. In the step of forming alternating phase regions, the phase regions formed on either side of the critical features are substantially different by 180xc2x0, most preferably, the phase regions formed on either side of the critical features are about 0xc2x0 and about 180xc2x0.
Advantageously, the step of forming phase regions of uniform width enhances across field line width variation by reducing sensitivity of the mask layout to lens aberrations. Furthermore, the step of forming phase regions of uniform width enhances across field line width variation by reducing sensitivity of the mask layout to phase width dependent line width bias.
In a second aspect, the present invention is directed to a method of reducing the effects of lens aberrations in alternating phase shifted mask lithography comprising the steps of: providing a chip layout having a plurality of features; determining which of the plurality of features are critical features; forming auxiliary phase transitions as determined by available space surrounding the critical features; forming phase regions of uniform width on either side of the critical features and the auxiliary phase transitions such that a grating pattern of substantially uniform pitch is formed on a mask layout; providing a complementary mask pattern to selectively delete any undesired printed images of the grating pattern; and reconstructing the features of the chip layout by deleting any undesired printed images of the grating pattern with the complementary mask pattern.
Preferably, the step of forming phase regions of uniform width is determined by available spacing between the critical features of the mask layout. During the step of forming phase regions, each phase region may be substantially equal in width to a minimum spacing between critical features. During the step of forming auxiliary phase transitions, a width of the auxiliary phase transition may be substantially equal to a width of a most narrow one of the critical features.
In a third aspect, the present invention is directed to a method of generating a mask layout comprising the steps of: providing a chip layout having a plurality of features; determining which of the plurality of features are critical features; forming phase regions of uniform width on either side of the critical features, the width of the phase regions substantially equal to a minimum spacing between the critical features, the phase regions alternating by about 180xc2x0; forming auxiliary phase transitions as determined by available space between the phase regions such that a grating pattern of substantially uniform pitch is formed on a mask layout comprising the critical features and the auxiliary phase transitions; forming additional phase regions alongside the auxiliary phase transitions; providing a complementary mask pattern to selectively delete any undesired printed images of the grating pattern; and reconstructing the critical features of the mask layout by deleting any undesired printed images of the grating pattern with the complementary mask pattern.
This aspect may further include the step of printing the mask layout using a first exposure such that a grating pattern is formed in an exposed photoresist layer of a target substrate; and the step of printing the complementary mask pattern using a second exposure to delete any undesired printed images of the grating pattern formed in a first exposure.